How it works
model size = parameters × bits / 8 × (1 + format overhead)
On a microcontroller, two budgets matter separately:
| Budget | Holds | Lives in |
|---|---|---|
| Flash | weights (read-only) | internal flash, or external xSPI flash on the STM32N6 |
| RAM | activation arena: intermediate tensors during one inference | internal SRAM |
The activation arena isn’t derivable from the parameter count: it depends on the largest pair of live tensors. Take it from your converter’s report: STEdgeAI / X-CUBE-AI “activations” size, TFLM arena_used_bytes(), or ESP-DL’s memory report. The tensor shape tool gives a first idea of tensor sizes.
Format overhead
int8 per-channel quantization stores a scale (and often a zero-point) per output channel, plus the graph and metadata. 2–10 % is typical; small models have relatively more overhead.
Device notes
- STM32N6 has no internal flash: weights sit in external memory-mapped xSPI flash (enter its size), and its 4.2 MB SRAM holds the arena. The Neural-ART NPU runs int8.
- ESP32-S3 modules often add 2–8 MB of PSRAM, slower than SRAM but usable for large arenas.
- Arduino Uno R3 (2 KB RAM) is out of reach for neural networks; the Nano 33 BLE Sense is the classic TinyML Arduino.
Memory figures are on-chip totals from vendor product pages; check your exact part number.